Linux FPGA software

copyright Jan Panteltje twenty first century
addional code by and copyright of:
many others

released under GPL 2


p3j uses Xilinx parallel cable III and JTAG to program a Digilent Digilab D2 board with Spartan2 FPGA
with a Xilinx format bitfile.
This program uses direct IO to the par port, user need root rights.

p3j-0.2.tgz

lsm info file




Using Xilinx Webpack-8.1i on grml Linux in scripted mode, without GUI.



Become root.
Get the webpack from Xilinx website, put in some directory, start WebPACK_81i_SFD.sh.
Once I did a disk install of grml, I changed quite a few things, so it is not original grml.
Important to all this may be that I installed latest Qt
But Qt4 takes hours to compile from source.
I also replaced the X server from X.org by XFree, and use fvwm as windows manager.
I am not 100% sure webpack installer use Qt, if its GUI does not pop up, then get some binary rpm and install old version of Qt perhaps?
For the rest you should not need to make any changes (like I did).
I could not read the characters in the webpack install, so clicked most right hand button and it installed.
The files will end up in /root/Xilinx/, the executables we will need here, in /root/Xilinx/bin/lin/
Here also are many .so files.

As I use the Digilent Digilab D2 board with par port cable 3 that uses JTAG, I will give an example how
to use a simple script to do all the work when configuring the FPGA with the Digilent button press
demo source in VHDL.


# Do this once, this is for install as root.
# for Xilinx webpack
#
#mkdir /usr/local/lib/xilinx/
#cp ~/Xilinx/bin/lin/*.so /usr/local/lib/xilinx/
#echo /usr/local/lib/xilinx >> /etc/ld.so.conf
#ldconfig
#
#In /etc/bashrc, or /root/.bashrc, or if you use zsh in /etc/zsh/zshenv, add at end:
#PLATFORM=lin
#XILINX=/root/Xilinx
#export XILINX
#PATH=/root/Xilinx/bin/lin:$PATH
#export PATH
#
#Start a new shell, zsh or perhasps bash:
#zsh

# This script programs the FPGA on Digilent Digilab D2 board with example BtnDemo.vhd, (button drives LED).
#
# In general:
# At least 4 input files are required:
# Sources:
# btndemo.vhd (or a verilog file, or .prj file) is the source file.
# btndemo.ucf has to be there as it holds at least the mapping of modules to IO pins.
# Options, these could also be used for other projects:
# btndemo.xst holds the xst options, for other projects modify the -p, -ent, -ifn, and -ofn in it.
# bitgen_options.ut This sets the bitgen options, note the '-g StartUpClk:JtagClk' must be set!
#
# Also set the FPGA type in 'map' below, the format is type-package-speedgrade.


The script 'test':
# prevent pointless warnings
export LANGUAGE=usenglish

# set with project name
prog=btndemo
# Use this if you want litte info on screen
style=silent
# Use this if you can read very fast
#style=xflow

echo "starting xst"
xst -intstyle $style -ifn $prog.xst

echo "starting ndgbuild"
ngdbuild -intstyle $style -dd _ngo -uc $prog.ucf $prog > ngdbuild.log

echo "starting map"
map -intstyle $style -cm area -pr b -k 4 -c 100 -tx off \
-p xc2s200-pq208-6 \
$prog.ngd -o $prog.map.ncd $prog.pcf

echo "starting par"
par -intstyle $style -w -ol std -t 1 $prog.map.ncd $prog.ncd $prog.pcf

echo "starting bitgen"
bitgen -intstyle $style -f bitgen_options.ut $prog.ncd

echo "starting impact ;-)"
echo "connect FPGA board and power, then type ENTER."
read user_reply
p3j $prog.bit


Pressing the button on the Digilab D2 board should now light the LED.
Yes I know a switch and battery is simpler.
If it does not work something was wrong, I have been bit by the bitgen StartUpClk option several times now.


If you want to make a real makefile, it is described at the xess website: makefile


Here is a nice test project, a frequency counter, it uses a 2 line LCD connected to the digilab D2:
frequency_counter-0.2.1.bz2

the lsm info file


Disclaimer:
I claim everything.